Low power consumption technologies are more and more concerned in portable electronic devices. For example, with respect to smart phones and tablet computers, static power consumption has become a critical indicator of the products. Because these products use batteries as power supplies, reduction of the power consumption signifies an increase of standby duration and life time, which eventually brings good use experience to users.
FIG. 1 illustrates a common voltage comparator circuit, and power consumption of the circuit is determined by a tail current source IB. The circuit has two deficiencies: firstly, in an equilibrium state where a tested voltage VIN is equal to a voltage of a first input terminal VR, IB is uniformly distributed in a branch where transistors M1 and M2 are located, that is, a current of 0.5*IB is sufficient to support operation of the branch where the transistor M2 is located. However, if VIN causes M1 to be cut off, generally the IB would totally flow through M2. Obviously, an excessive current of 0.5*IB is wasted. Secondly, the tail current source IB is generally formed by NMOS transistors, and an additional bias circuit is required for providing a gate voltage. Therefore, the actual power consumption of the circuit is even greater.
A related fully-differential high-speed low power consumption comparator has the advantages of high output slew rate and high speed. However, the power consumption of such comparator reaches 56 μW, and this power consumption is calculated without taking into account the bias circuit needed for the comparator. Therefore, the actual power consumption of the circuit is even greater. For example, a related time domain comparator with a low power consumption feedback control structure uses digital logic control for reducing static power consumption. However, the power consumption of such comparator is 9 μW, and this power consumption is calculated without taking into account a digital time sequence circuit needed for the comparator. Similarly, the actual power consumption of the circuit is even greater. Still for example, a related voltage comparator uses sub-threshold working properties of transistor for reducing the power consumption of the circuit while ensuring a specific circuit delay, and the power consumption is 2 μW. In addition, although the circuit may have self-biasing capability, the comparator has four power-consuming branches. Therefore, if it is desired to reduce the operating current to be less than 100 nA, the power consumption of each branch needs to be averagely reduced to 25 nA, and this lowers a reliability of the circuit.